October 29, 2025
Sonic Boom or Sonic Bust?
Berkeley Out-of-Order RISC-V Processor (Boom) (2020)
Berkeley’s open chip star stalls? Fans cry: Sonic Boom or bust
TLDR: BOOM, Berkeley’s open RISC-V chip effort, has fans worried the “Sonic Boom” branch is stalling. The thread splits between calls for simpler, cheap-to-run cores and cheers that open projects like XiangShan beat paid chips—spotlighting the tension between accessibility and raw performance in open hardware.
Meet BOOM: Berkeley’s ambitious open chip project that rearranges work to go faster, inspired by classic speed demons MIPS and Alpha. It’s built with Chisel (a hardware coding tool) and is more like a recipe book than a single chip—mix and match pieces via the Rocket Chip library to make your own. But the crowd isn’t clapping—it's clutching popcorn. One commenter pointed to the BOOM repo and sighed that the “Sonic Boom” update looks sleepy, noting only one big commit in a year. Cue the meme parade: “Sonic Boom? More like Sonic Snooze,” joked another.
Meanwhile, a practical voice jumped in: “I don’t need the turbo stuff.” Translation: BOOM’s out-of-order magic (doing tasks in a smarter order) is cool, but some researchers just want a simple, buildable RISC-V core for a cheap FPGA board like an Artix A7. The vibe: accessibility vs. ambition.
Then came the flex: a commenter declared open-source is beating the big-name, paid chips, crowning XiangShan the current speed king. That lit up a fresh fight—benchmarks vs. buildability—with jokes about “Sonic Boom vs. Sonic Bust” and whether BOOM’s legendary roots have turned into vintage nostalgia. The thread reads like a tech telenovela: stalled updates, budget dreams, and open-source bragging rights—all in one spicy scroll.
Key Points
- •BOOM is an out-of-order processor design inspired by MIPS R10000 and Alpha 21264.
- •It uses a unified physical register file, also known as explicit register renaming.
- •BOOM implements the open-source RISC-V ISA.
- •The design is written in Chisel as a generator, making BOOM a family of cores rather than a single instance.
- •For SoC construction, BOOM leverages the Rocket Chip SoC generator to reuse components like TLBs and PTWs.