November 30, 2025
Hot takes meet cold logic
Mike Gordon and Hardware Verification
He used math to make chips behave—and the commenters went wild
TLDR: The article celebrates Mike Gordon’s breakthrough: using precise math to verify chips behave as intended. Commenters split between praising formal proofs as sanity savers and roasting them as idealized models that ignore messy real-world physics, turning a quiet history lesson into a math-vs-metal cage match.
A throwback piece on Cambridge legend Mike Gordon lit up the comments with a full-on culture clash: math vs metal. Gordon’s big idea—use higher‑order logic (HOL, a precise math language) to model and prove what a chip should do—had purists cheering and pragmatists rolling their eyes. One camp is swooning over the elegance: “Spec says what we want, Imp says what we built, prove Imp → Spec.” The other camp is yelling, “Try modeling heat, noise, and ‘oops the wire is actually a tiny antenna’ with equations!”
Drama spiked over the anecdote where the author didn’t co‑author with Gordon; cue alt‑timeline memes about “the greatest paper never written.” Hardware vets grumbled that “simple models of CMOS” are cute until reality bites, while formal-methods fans clapped back that models are the only way to keep billion‑transistor designs sane. The “hide the ports” trick (you literally “hide” a wire in math) became a meme: “Existential quantification = shove the messy wire under the rug.” Meanwhile, old-school flowchart nostalgia from the Floyd and Hoare era sparked debates about whether software ever caught up.
Bottom line: Gordon made proving hardware feel doable—and the comments proved nothing gets people louder than math telling silicon what to do.
Key Points
- •Early formal verification hopes from Floyd and Hoare slowed due to software complexity.
- •Mike Gordon developed a method to model hardware circuits using higher-order logic.
- •Devices are modeled relationally over ports without fixed input/output roles.
- •Circuit composition uses conjunction of component formulas and variable identification, with hidden ports via existential quantification.
- •Verification reduces to proving the implementation formula implies the specification (Imp → Spec).