December 9, 2025
Math coprocessor, drama processor
The stack circuitry of the Intel 8087 floating point chip, reverse-engineered
Chip autopsy of Intel’s 8087 has nerds fighting over stacks, π, and 80‑bit weirdness
TLDR: A deep dive into Intel’s 8087 reveals a stack-based design and a clever semi‑analog microcode trick. Commenters split between 80‑bit format fandom, barrel‑shifter nostalgia, and debates about merging integer and floating math—proof this old chip still sparks new arguments.
Tech archaeologists cracked open Intel’s 8087—the 1980 math coprocessor that made early PCs do number magic up to 100× faster—and the comments exploded. The chip’s wild design: a stack of eight registers you “push” and “pop” like pancakes, a constant vault (yes, π lives there), and a semi‑analog microcode trick that crams two bits into one transistor by using different transistor sizes. Nostalgia came in hot: one commenter bragged about overclocking an 8087 in their old XT, saying Turbo Pascal and spreadsheets suddenly flew. Even the author popped in: “Author here for your 8087 questions,” instantly turning the thread into office hours.
Then the drama: format fanatics vs. design pragmatists. One camp drooled over the quirky 80‑bit format (“mantissa mania!”), while performance wonks fixated on the barrel shifter and renormalization, calling them the real action. The quirkiest twist? A debate on why modern chips don’t mash integer and floating math together, with shoutouts to the MIPS R4200. Jokes flew—“π stored in ROM because even chips need a cheat sheet,” “Team Stack vs. Team Pick‑a‑Register”—as people argued whether the stack idea was genius or a beautiful headache. Verdict: this silicon autopsy is both museum piece and blueprint, but the comments are the real show.
Key Points
- •Intel’s 8087 floating-point coprocessor (introduced in 1980) accelerated floating-point operations by up to 100×, benefiting IBM PC software and influencing modern floating-point systems.
- •Die inspection shows a bottom-half datapath for 80-bit values, a constant ROM (including π), and an eight-register stack with control logic on the right.
- •A central, large microcode ROM defines instructions and is semi-analog, storing two bits per transistor via four transistor sizes.
- •Execution involves instruction decode, a microcode engine running micro-instructions, decode logic generating control signals, bus interfaces to the 8086, and a charge-pump-based substrate bias generator.
- •The 8087 uses an eight-register stack architecture: push/pop adjust the Stack Top pointer; registers are 80-bit (64-bit significand, 15-bit exponent, 1 sign), arranged as an 8×80 grid of static RAM cells and occupy substantial die area.