February 10, 2026
Shift Happens
80386 Barrel Shifter
Old Intel barrel shifter rekindles a 'bad design' brawl
TLDR: A developer recreating the classic Intel 386 uncovered a clever one-cycle barrel shifter using original microcode. Commenters debated rotate-through-carry as a 'bad decision,' questioned odd bit tests beyond memory, and demanded the full microcode—turning retro engineering into a lively fight over design choices.
Old-school chip wizardry is back: a dev is rebuilding the classic Intel 386 using its original “microcode”—the tiny instruction recipes buried inside the silicon—and just made real mode work in simulation with over 10,000 tests passing. The star today is the 386’s barrel shifter, a two-step, one-cycle shift machine that handles moves and rotations without breaking a sweat. It even doubles up for tricky instructions by feeding 64 bits in and spitting out 32. Fun fact: it uses about 2,000 transistors—roughly half a whole 6502 home-computer CPU. For deeper silicon nerdiness, see Ken Shirriff’s deep dive.
But the comments turned this lovefest into a showdown. User rep_lodsb blasted the choice to use “rotate through carry,” calling it a bad decision because most code rotates just one bit and the constant-time trick is “only faster when the count is > 6.” Meanwhile, cmovq asked why the chip lets you test bits beyond the actual memory word—cue puzzled faces and 'out-of-bounds bit' jokes. People also begged, “Is the full microcode available?” as if it’s the missing manual. The vibe: half cheering the elegant hardware, half side-eyeing microcode decisions and odd edge cases—plus a few quips like “Shift Happens” to keep it spicy.
Key Points
- •An 80386-compatible core is being built in SystemVerilog using original Intel 386 microcode; real mode works in simulation with 10,000+ single-instruction tests, and protected-mode work is ongoing.
- •The 386 uses a hybrid two-stage barrel shifter: a 32x8 coarse crossbar shifting by multiples of 4 bits and a fine shifter handling 0–3 bits, enabling any 0–31-bit shift in one cycle.
- •The barrel shifter’s 64-bit input and 32-bit output let the same hardware serve shifts, rotates, and double-precision shifts via microcode configuration of the two 32-bit halves.
- •Microcode controls the shifter via SHIFT1 (latching count and direction from ModR/M) and SHIFT2 (executing the shift), followed by result write-back.
- •ROL, ROR, SHL, SHR, and SAR share identical three-micro-instruction sequences across immediate, CL, and count=1 variants (entries 0F9/0FA/0FB, 0FF/100/101, 105/106/107).