April 4, 2026
Sparks on the solder mask
Sequential Optimal Packing for PCB Placement
One‑by‑one chip layout drops — solver vs AI smackdown
TLDR: A step-by-step chip placement method promises faster, more predictable circuit boards by following human rules. The comments erupted into a three-way brawl: optimizer fans vs. realists who say constraints ruin neat formulas vs. AI boosters who want vision-enabled chatbots to auto-place parts—stakes are time, headaches, and working hardware
A new idea for laying out circuit boards just landed, and the comments immediately turned into a showdown. In simple terms, Seve Ibarluzea proposes packing chips one at a time, scoring each move by how well it follows human rules—think “USB port near the edge” and “tiny power capacitors by the chip”—so the board is easier to wire later. It’s fast, predictable, and you can watch it work step‑by‑step. Fans say it’s refreshingly simple compared to chaotic auto‑placement tools.
But the crowd split fast. One camp asked if a big math hammer—Mixed Integer Programming (a fancy optimizer)—could beat it. The loudest skeptic dropped the cold splash: PCB design is hard, and real‑world constraints pop up later and ruin perfect formulas. Meanwhile, the hype squad wants AI to take the wheel: bring on vision‑powered chatbots that can “see” a layout and iterate their way to greatness. Cue the drama: math vs reality vs machines.
Humor flew in too. Commenters joked about turning placement into “PCB Tetris” with an undo button, begged the algorithm to save them from “spaghetti wires,” and imagined an AI with a ruler and glue stick. The vibe? Promising idea, scorching debate, and memes sizzling on the side
Key Points
- •Sequential Optimal Packing is a deterministic PCB placement algorithm that places components in a defined order using a cost function for each step.
- •Design intent and constraints can be captured in tscircuit via layout tags and coordinate expressions, but complex designs often require more flexible methods.
- •The algorithm workflow: order components; if none are preplaced, start at center; then iteratively select each component, compute optimal position/rotation based on a cost function, and place it.
- •Efficiency is achieved by computing boundaries from already placed features and evaluating cost-function minima along boundary segments.
- •Benefits include transparency, debuggability (via tscircuit’s Solvers tab), and compatibility with fixed reference groups and partially pre-placed layouts; downsides include unspecified issues, one involving pack order.