April 18, 2026
Float switch, or float glitch?
Floating Point Fun on Cortex-M Processors
Tiny chips, big float drama: can you flip the math switch
TLDR: A deep‑dive explains why mixing floating‑point settings on tiny Arm chips can break builds and cause scary errors. One commenter stirs the pot by asking if the math unit can be toggled on demand via exceptions, sparking a power‑saving vs. complexity debate that every embedded developer should care about.
Engineers are clutching their coffee as this post explains why tiny chips throw a linker tantrum the moment you mix-and-match floating‑point settings. The gist: some microcontrollers have a “math brain” (the Floating Point Unit, or FPU). If your code and libraries don’t agree on how to use it, the build explodes with the dreaded “uses VFP register arguments” error. The author walks through the three modes—soft (no hardware math), softfp (halfway house), and hard (full hardware)—and how arguments hop between normal registers and special math registers.
But the comment section lit up with a brain‑teaser: can you just turn the math brain off, and only flip it on when code needs it—like a motion sensor for numbers? One reader wonders if you can let the chip throw an exception (a controlled error), then enable the FPU on the fly. Cue the mental sitcom: devs imagine slapping a “Clap On, Clap Off” switch onto floating point.
The mood? Equal parts “this could save power and bugs” and “are we summoning chaos demons with surprise exceptions?” It’s classic embedded drama: saving battery vs. keeping code simple. And yes, the meme energy is real—“just-in-time math” might be the new hot phrase engineers love to hate.
Key Points
- •Mixing hard-float and soft-float objects can trigger linker errors (e.g., ld.bfd reporting mismatched VFP register arguments).
- •Arm defines three floating-point ABIs (-mfloat-abi): soft, softfp, and hard, each with distinct calling conventions.
- •In soft and softfp ABIs, floating-point values are passed via integer registers; hard ABI uses FPU-specific calling conventions.
- •Arm passes function arguments in r0–r3 and spills excess to the stack; with the FP extension, s0–s31 are available for floating-point.
- •The nRF52840 example with CryptoCell 310 and nrf_cc310_mbedcrypto illustrates why selecting matching library variants (hard vs soft) matters.