May 15, 2026
Nibble fight at calculator club
I designed a nibble-oriented CPU in Verilog to build a scientific calculator
He built a calculator from scratch and the comments instantly turned into HP nostalgia and nerd debate
TLDR: A creator built a scientific calculator from scratch on a programmable chip, complete with a custom mini-processor. Commenters loved the retro HP calculator vibes, then instantly swerved into a wonderfully nerdy argument over whether a 4-bit “nibble” becomes the machine’s version of a byte.
A hobby hardware maker just did the kind of thing that makes the internet sit up straight: he built a working scientific calculator on an FPGA, basically a reprogrammable chip, using his own tiny custom processor and homemade control code. Yes, this is a calculator story, but the real action is in the comments, where readers immediately split into two camps: awed nostalgia and delightfully petty technical arguing.
The loudest reaction was pure old-school calculator romance. One commenter took everyone straight back to the glory days of HP calculators, reminiscing about the legendary feel of the buttons, the tank-like build quality, and the sheer chaos of asking a classmate to use one and then watching them panic when they had to enter numbers “the weird HP way.” That comment basically turned into a love letter to an era when calculators felt like status symbols instead of free phone apps.
But of course, no online hardware thread stays sentimental for long. Another commenter zoomed in on the project’s central idea — storing decimal numbers in 4-bit chunks — and raised the kind of gloriously niche question only the internet could turn into a mini-drama: if the machine works in nibbles, is a nibble basically its byte now? It’s the sort of semantic debate that outsiders will find absurd and insiders will absolutely lose sleep over.
Meanwhile, the project creator framed it as a rabbit-hole quest to figure out how classic HP scientific calculators worked deep down, and commenters clearly loved that energy. The vibe was equal parts admiration, retro fandom, and “we are absolutely about to argue about units of data for 40 posts.”
Key Points
- •The project implements a fully functional scientific calculator in FPGA hardware using a custom soft CPU and microcode firmware.
- •The repository contains source code, simulation setups, synthesis files, debugging tools, and verification utilities across folders such as verilog/, ucode/, quartus/, modelsim/, Qt/, and calctest/.
- •A Qt-based simulator and debugger is provided, and browser-based versions of the calculator are also available.
- •The build and verification workflow depends on tools including Verilator, Qt 6.9+, Quartus 13.0 SP1, ModelSim, Visual Studio 2022, and Python 3.
- •The repository includes additional pathfinding and verification projects for BCD arithmetic, algorithm proofs of concept, input simulation, and keyboard layout testing.