July 27, 2026
DDRama in the memory lane
Show HN: Running PrismML's Bonsai inside DRAM by breaking DDR4 timing rules
Wild AI memory hack lands on Hacker News — and the comments instantly roast the write-up
TLDR: A Hacker News post claims it can run AI partly inside ordinary computer memory, which could matter for faster private AI on phones. Commenters were split between "this sounds huge" and "I can't get past the awful write-up," turning the discussion into a roast with a side of cautious curiosity.
A bold Show HN post tried to sell a jaw-dropping idea: instead of constantly shuttling AI data back and forth, why not make the computer’s memory do some of the work itself? The creator says this could help huge on-device AI models run faster, cooler, and with better privacy on phones. In plain English, it’s a pitch for making future gadgets handle more AI locally instead of leaning so hard on the cloud.
But on Hacker News, the real fireworks weren’t about the breakthrough — they were about the readme. Multiple commenters basically hit the brakes because the project description felt, in their words, like unreadable AI mush. One of the harshest reactions called it “the ramblings of a crazy person,” while another sighed that the “slop readme” made them give up halfway through. Ouch. The biggest drama here is classic internet tech culture: is this genius buried under bad communication, or hype buried under buzzwords?
Not everyone came just to throw tomatoes. A few readers leaned in with genuine curiosity, asking whether changing voltage on the fly could unlock even more tricks, and one commenter openly begged for “more proof” behind the claimed 13x speedup. That created the thread’s main split-screen energy: skeptics mocking the packaging, hopeful nerds asking for receipts. The accidental comedy is brutal and very Hacker News — a potentially huge hardware idea getting overshadowed because the internet decided the prose committed crimes first.
Key Points
- •The Show HN post introduces CaSA, a project that claims to run ternary LLM inference directly inside commodity DRAM.
- •The article frames PrismML's 1-bit/ternary Bonsai models as relevant to deploying large language models on smartphones and other edge devices.
- •It argues that fitting a 27B+ parameter ternary model in RAM does not solve the bandwidth cost of moving weights across the SoC bus.
- •The post says standard LPDDR memory would create bandwidth, thermal, and battery constraints for on-device inference at that scale.
- •CaSA is described as using charge-sharing in DRAM and bypassing the memory bus, with a GitHub repository provided for the project.