August 9, 2026
RISCy business, vintage drama
Show HN: A Project Oberon System version running on RISC-V instead of RISC-5
Old-school coding dream gets a modern reboot — and the comments instantly turned spicy
TLDR: A classic minimalist computer system from the 1980s/2010s has been adapted to run on a more common modern chip design, making it easier to use today. Commenters loved the tribute to computing history, but quickly spun into platform snobbery, credit-checking, and confused-but-fair questions from newcomers.
A beloved retro computer project just got dragged into the present, and the crowd reaction was half applause, half nerdy food fight. The big news: a fan has moved Project Oberon — a famously small, elegant computer system designed by computing legend Niklaus Wirth — from Wirth’s own custom chip design to RISC-V, a more common modern processor style. In plain English, it means this tiny, beautifully documented old-school system now has a much more practical path to run on today’s hardware.
But on Hacker News, the real show was the comment section. Some readers were genuinely swooning, calling it a loving tribute to Wirth and praising the project for keeping a minimalist computing philosophy alive. One commenter basically wrote a valentine to Oberon’s simplicity, and that warm nostalgia vibe was strong.
Then came the pedantic plot twist: one person jumped in to remind everyone that this is not the first Oberon-on-RISC-V rodeo, linking an earlier project like the thread’s self-appointed continuity editor. Another mini-drama erupted when someone asked the very fair non-expert question: “what does RISC-V instead of RISC-5 mean?” Which is honestly the perfect symbol of this whole post — part deep computer history lesson, part “please explain this in human language.”
And of course, there was hardware snobbery. One commenter argued that if you want people to actually use your chip project, you should have picked MiSTer FPGA from day one. Translation: even in a wholesome retro-computing celebration, the platform wars never sleep.
Key Points
- •The project ports Project Oberon from Oberon-07 to Oberon-90 and uses an OP2 compiler with an RV32 RISC-V backend.
- •The repository includes a RISC-V-based virtual machine that reproduces Wirth's original memory map so key modules can remain unchanged.
- •Project Oberon originated as a complete hardware-software system designed by Niklaus Wirth and Jürg Gutknecht at ETH Zürich and documented in a 1992 book.
- •Wirth replaced the original NS32032-based hardware with his own RISC-5 processor implemented on FPGA hardware and described in Verilog.
- •The article presents migration to RISC-V as a practical way to preserve Oberon's design principles while targeting widely available modern hardware such as ESP32-based boards.