February 26, 2026
Rings, ROM, and rage
80386 Protection
Nostalgia, nerd fights, and the 386 that birthed Windows
TLDR: A builder explained how the 80386 used a tiny hardware unit to check memory access rules fast, enabling safer multitasking. Comments erupted with nostalgia, a fight over Windows 3.0’s “32-bit” lore, and war stories of chips freezing, plus a debate on hardware protection versus software verification—why computing got complicated.
A retro-hardware blogger just peeled back the curtain on how the Intel 80386 made memory protection fast with a tiny on-chip “traffic cop” that checked permissions in one go. The crowd went wild. One camp got misty-eyed—“This made me think of DesqView”—while another slammed the brakes with a fact-check: did Windows 3.0 really use 32-bit flat memory in 386 mode, or is that tech folklore? Cue the comment courtroom.
Then the horror stories arrived. A veteran recalled the “Accessed/Dirty” page-table bits saga—some chips flipped them in stages, others at the end, and a few did a paranoid re-read that froze if the tables lived in ROM. Translation: your PC would go full statue because it tried to double-check what it wasn’t allowed to change. Meanwhile, the philosopher-engineers asked: could we ditch hardware guards entirely if we verified code like the JVM or .NET? The thread split between “hardware saved us” and “software could’ve done it,” while the article’s big reveal—an on-chip rule-checker instead of slow microcode—got applause. In short: nostalgia, nitpicks, and gnarly bugs collided as everyone relived the 386’s four rings like a tech soap opera.
Key Points
- •The 80386 made protected mode practical by adding paging, a flat 32-bit address space, per-page U/S control, and Virtual 8086 mode.
- •Memory protection uses two layers: segmentation (logical to linear with checks) and optional paging (linear to physical with U/S and R/W protections).
- •Privilege checks involve CPL, DPL, and RPL, with the main data rule max(CPL, RPL) ≤ DPL; code transfers have more complex rules.
- •A dedicated Protection Test Unit built around a PLA performs protection checks in parallel, outputting continue/fault/redirect decisions.
- •Additional hardware—page table walk state machine and segment/paging caches—supports efficient protected-mode operation, with microcode handling remaining tasks.